Doping by nitrogen implantation and characterization of heteroepitaxial 3C-SiC thin films on Si and SOI substrates

Doping of heteroepitaxial 3C-SiC thin films on Si substrates by nitrogen implantation was studiert during this work with the goal to obtain high electrical activation of the implanted dopant, low implantation damage in the SiC film, and high values for the carrier mobility without damaging the Si substrate. Therefore different implantation and annealing conditions were investigated with the maximum temperatures being well below the melting point of Si (1412 degrees Celsius). The implantation temperatures ranged from room temperature to 1200 degrees Celsius and the post implantation annealing temperatures were 1200 degrees Celsius in a nitrogen atmosphere or in vacuum, or 1340 degrees Celsius in vacuum. The temperature dependent electrical activation of the implanted dopants and the free carrier mobility were determined from resistivity and Hall measurements. The nitrogen implantation profiles were calculated using the Monte Carlo program 'TRIM'. The calculated results were verified by matching Pearson distributions to the measured SIMS profiles of samples implanted at different energies (50 - 180 keV), temperatures (room temperature - 1200 degrees Celsius), and doses (5E14 and 5E15 per square centimeter). Besides for channeling effects a good agreement between the calculated (TRIM) and measured (SIMS) curves was obtained and TRIM calculations proved to be a useful tool for simulating implantation profiles in SiC, especially since the nitrogen implantation profiles showed only little dependence on the implantation temperature. To be able to exploit the high temperature capability of heteroepitaxial 3C-SiC films, electrical insulation of the SiC film from the substrate up to high temperatures (>400 degrees Celsius) is necessary. This was done by depositing single crystal 3C-SiC films on SOI substrates. SIMOX substrates with an implanted oxide and UNIBOND wafers with a thermal oxide were used for SiC deposition. The films grown on SOI wafers showed similar crystal quaiity as films grown on Si wafers. The SiC/SOI material system demonstrated good electrical insulation of the SiC from the bulk wafer for temperatures up to 450 degrees Celsius even though some damage, such as cavities in the Si overlayer and the buried oxide layer, was introduced into the SOI wafer during SiC deposition. The reason for the damage in the oxide layer is assumed to be the high SiC deposition temperature of approximately 1350 degrees Celsius. By lowering the deposition temperature a damage reduction was observed, i. e., the size and density of the cavities was lowered. Even though further optimization of the deposition conditions for 3C-SiC films on SOI substrates is necessary, the possibility of SiC heteroepitaxy on SOI wafers and the suitability of the new SiC/SOI material system for high temperature applications was demonstrated.